Unlocking the future of compute systems with the NanoIC pilot line

The NanoIC pilot line is one of the four semiconductor pilot lines approved by the Chip Joint Undertaking (Chips JU) to fulfill the mission of the European Chips Act to bring Europe back to the forefront of chip innovation.

This comprehensive article presents the NanoIC consortium and the complementary expertise of its partners: imec, CEA-Leti, Fraunhofer-Gesellschaft (FhG), VTT Technical Research Center of Finland, Tyndall National Institute, and the Center for Surface Science and Nanotechnology of the University POLITEHNICA of Bucharest.

It also takes a deep dive into how the NanoIC pilot line will enable the next big leap in semiconductor technology by:

• Exploring the building blocks of future compute systems: advanced logic, novel memories, and next-gen interconnects.
• Bringing these technologies to higher maturity, including integration baseline flows for repeatability, variability, and defectivity improvements.
• Making the technologies available to designers through research and prototyping PDKs.

Read the imec article