At the 2026 edition of imec’s ITF World conference, NanoIC hosted a dedicated workshop bringing together industry experts, researchers, and innovators to explore Europe’s efforts in advancing semiconductor technologies beyond the 2nm node.
The session provided a comprehensive overview of the NanoIC pilot line and its role in supporting next-generation chip design and integration.
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- Opening speech: NanoIC a key part of the Chips JU actions under Chips for EU initiative (Anton Chichkov, Head of Programmes & Communication - Chips JU)
- Semiconductors for Europe’s economic growth, industrial competitiveness, and digital sovereignty (Maria Marced, Corporate Director - CEVA, IQE, Sequans Communications, KD)
- High NA EUV adoption: The next step in lithography leadership (Pieter Vanelderen, Program Manager Advanced Patterning - imec, & Sara Paolillo, Dry Etch R&D Engineer - imec)
- Capacitor-less embedded DRAM: a game-changer for memory scaling (Attilio Belmonte, Program Director Active Memory - imec; Anastasiia Kruv, Senior Device Engineer - imec; François Andrieu, Head of Memory & Computing Laboratory - CEA-Leti and Oreste Madia, Program Manager NanoIC - Tyndall National Institute)
- Towards a renewal of memory from Europe (Thomas Rückes, CEO - Ferroelectric Memory Company)
- Interposer: one substrate to connect them all (Dimitrios Velenis, Project Manager – imec & Natalie Roels, Litho Process Engineer - imec)
- Interposers role in advanced packaging (Khaled Maalej, Founder & CEO - VSORA)
- Launching Europe into the nanosheet era (Frank Holsteyns, VP R&D Unit Process & Modules - imec, Gabriel Soares, R&D Engineer - imec, Cassie Sheng, Senior R&D Integration Engineer - imec, Harinarayanan Puliyalil, R&D Engineer - imec, Jérôme Mitard, R&D Manager – imec & Pantelis Butzopulos, Research Engineer - VTT.
- Design enablement services - lowering the barrier for IC design companies (Romano Hoofman, Strategic Development Director - imec)
Published on:
7 July 2026
