Riga Chip Summit 2026
May 13, 2026 | Riga, Latvia
The first chip-dedicated summit in Latvia
On 13 May, the Riga Chip Summit 2026, the first chip-dedicated summit in Latvia organised by the Latvian Chip Competence Centre (LCCC), will bring together stakeholders from industry, academia, finance, competence centres, start-ups, and SMEs from the Nordic–Baltic region and the wider European ecosystem.
The event aims to explore opportunities, pathways, and challenges related to advancing chip business ideas within the Chips Joint Undertaking (Chips JU) framework and to provide companies with a clear overview of the EU microchip ecosystem and the support mechanisms available through Chips JU. It provides a platform for knowledge exchange and shared learning while encouraging international collaboration. The summit also encourages business collaboration through matchmaking sessions and networking opportunities designed to help participants build new partnerships.
Additionally, the summit helps companies better understand pilot project requirements, technology readiness levels (TRL), co-funding structures, intellectual property considerations, and the pathway toward commercialisation. Through start-up showcases, success stories, and university involvement, the event demonstrates that entering the microchip sector is achievable for SMEs and startups across the Baltic-Nordic region and wider Europe.
NanoIC at Riga Chip Summit 2026
NanoIC will be present at the summit with a dedicated booth. Visitors are invited to explore how the NanoIC pilot line supports and accelerates innovation within Europe's strategic markets by targeting the development of beyond-2nm systems-on-chip (SoC). The pilot line offers low-barrier access to state-of-the-art equipment, and opportunities for advanced research and development of new materials, process steps, and modules.
Stop by the NanoIC booth to learn how your organisation—whether an SME, start‑up, research institute, or industrial player—can leverage the NanoIC pilot line to accelerate innovation, reduce development risk, and move more efficiently from research to industrial uptake within the European chip ecosystem.