NanoIC Seminar at the University of Málaga
October 1, 2026 | Málaga, Spain
Join NanoIC and imec for an afternoon of expert talks exploring key technology building blocks for future semiconductor innovation. The seminar will be delivered by leading imec researchers and technology specialists whose work contributes to Europe's ambitions under the EU Chips Act and the development of the NanoIC pilot line.
Hosted by the University of Málaga, this seminar reflects NanoIC's commitment to educating the next generation of semiconductor engineers and researchers. By bringing world-leading imec experts directly to students, academics, and industry professionals, NanoIC aims to bridge the gap between cutting-edge research and the skills needed to drive Europe's semiconductor future.
To extend its educational impact, the seminar will also be livestreamed to relevant Spanish university cátedras participating in the national Chips Initiative, enabling students and researchers across Spain to engage with Europe's most advanced semiconductor research and innovation activities.
Programme
The programme brings together the three core technology domains of the NanoIC pilot line: advanced logic, advanced packaging, and next-generation memory technologies. Through presentations by leading imec experts, participants will gain insight into the innovations shaping the future of semiconductor research and development, while discovering the opportunities created by the EU Chips Act and the NanoIC pilot line.
Introduction to the EU Chips Act NanoIC Pilot Line and Advanced Logic Scaling: Technologies for the Sub-2nm Era
Marie Garcia Bardon
This session introduces the NanoIC pilot line established under the EU Chips Act and explores the technological innovations enabling advanced logic devices beyond the 2 nm node. Attendees will gain insight into emerging transistor architectures, process integration challenges, and the scaling strategies that will drive future semiconductor generations.
Enabling Chiplet Architectures Through Advanced Packaging and High-Density Interconnects
Nicolas Pantano
As heterogeneous integration becomes increasingly important, advanced packaging technologies are emerging as a key enabler of high-performance chiplet-based systems. This presentation will discuss the latest developments in packaging, integration technologies, and high-density interconnects that are redefining system-level performance.
Opportunities in Memory Scaling: Design-Technology Co-Optimization for SRAM and Emerging Memories
Fernando Garcia Redondo
This talk will examine current and future approaches to memory scaling, focusing on SRAM optimization and emerging memory technologies. Participants will learn how design-technology co-optimization can improve performance, efficiency, and scalability for next-generation computing applications.