November 12 - 13, 2025 | Leuven, Belgium
In-depth exploration of advanced lithography within nanoelectronics and semiconductor technologies, and networking opportunities with peers and professionals across Europe.
The NanoIC pilot line focuses on developing talent and skills critical to the success of the pilot line and the EU Chips Act. Imec invites students, scientists, and engineers to participate in the NanoIC European Winter School on Patterning 2025. This two-day event will feature distinguished speakers from imec who will share their expertise in lithography and semiconductor technology. The Winter School will cover the in-depth exploration of advanced lithography within nanoelectronics and semiconductor technologies, and networking opportunities with peers and professionals across Europe.
Who should attend: Masters students and PhDs in STEM disciplines, and scientists or engineers in technology companies who have a solid understanding of lithography and semiconductor technology. This is a unique opportunity for students to get a behind-the-scenes impression of imec and connect with senior scientists in an informal setting.
The course fee of €75 includes all lunches, the official reception and the dinner. Please register before 1 Nov. 2025.
CMOS processing introduction
This session offers a foundational overview of Complementary Metal–Oxide–Semiconductor (CMOS) technology, the backbone of modern integrated circuits. Participants will explore how integrated circuit (IC) chips are built—from the transistor level through to final packaging—gaining insight into the full CMOS fabrication flow.
Fundamentals of lithography & patterning
This lecture introduces the principles of lithography and its critical role in semiconductor manufacturing. Attendees will learn about the core components of a lithography tool cluster, the standard process flow, and the evolution of lithography systems to meet the demands of ever-shrinking device dimensions. Key pattern quality metrics and optimization strategies will also be discussed, laying the groundwork for more advanced sessions.
The Evolution, Science and Processing of Photoresists in Lithography
Dive into the chemistry and processing of photoresists, the light-sensitive materials essential to pattern transfer. This course covers the behavior of various resist types—from conventional to EUV—and explores concepts like contrast, acid diffusion, and defect formation. Participants will also examine how photoresists are processed on wafers to achieve nanoscale resolution and defect control.
From Visible to Extreme UV: The Evolution of Information Transfer in Semiconductor Projection Lithography
Trace the technological journey of projection lithography from visible light to today’s extreme ultraviolet (EUV) systems. This session highlights innovations in optics, light sources, masks, and resists that have enabled precise pattern transfer. Emphasis is placed on resolution enhancement techniques and the future of atomistic-scale lithography.
Mask technology
This class explores the role of photomasks in the lithography process. Participants will learn about the challenges of mask design and fabrication in the context of continued scaling, and review engineering solutions and the full mask-making process flow.
Overview of techniques for semiconductor pattering
Gain a comprehensive understanding of the patterning cycle used to build semiconductor devices layer by layer. This session covers deposition, lithography, etching, fill, and planarization, along with advanced techniques like multi-patterning, self-alignment, and selective material growth used in cutting-edge device fabrication.
New approaches to build complex patterns (ALE, ASD)
Explore the synergy between Atomic Layer Etching (ALE) and Area-Selective Deposition (ASD) in enabling atomic-scale, bottom-up fabrication. This session reviews the principles, applications, and integration of these techniques in advanced patterning schemes.
Metrology
This course provides both a conceptual and practical understanding of metrology in semiconductor manufacturing. It focuses on the tools, methodologies, and precision requirements necessary for quality control and yield optimization in high-volume IC production.
This event is organized with the funding of the European Union's Horizon Europe initiative 101183277, which aims to support the NanoIC European pilot line for research, innovation, and communication related to beyond 2nm leading edge System-on-Chip technology across the value chain.