ESSERC 2026

NanoIC will be participating in ESSERC 2026, the annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. With the level of integration for system-on-chip design rapidly increasing, a deeper interaction among technologists, device experts, IC designers and system designers is paramount. The year's program includes tutorials and workshops, keynote presentations covering circuit and design aspects, semiconductor technologies, and integrated technologies and devices, a selection of research papers covering circuit and design aspects, semiconductor technologies, and integrated technologies and devices, the ESSERC 2025 Best Paper Awards, and various networking opportunities. 

BOOTH 

The NanoIC pilot line will be represented at ESSERC 2026 with a dedicated booth (booth number will confirmed upon availability). We warmly invite all conference attendees to visit us and learn more about our state‑of‑the‑art 300 mm capabilities that drive innovation in logic, interconnect, and memory technologies.

PAPERS

• A14 Pathfinding PDK with Backside Direct Contact for Power and Area Scaling Beyond N2
  Yun-Jing Lin, Gabriel M. Soares, Halil Kükner, Subhash Sharma, Juergen Boemmels, Sheng Yang, Lynn Verschueren, Odysseas Zografos, 
  Maarten Van de Put, Anita Farokhnejad, S. M. Yasser Sherazi, and Marie Garcia Bardon
   
• Energy-Efficient, High-Density, and High-Performance IGZO eDRAM in Advanced Technology for AI Memory
  A. Sharma, C. Apte, D. Matsubayashi, L. M. Giacomini Rocha, H. Oh, K. English, R. Schreiber, J. Wuu, S. Subhechha, H. Watson, L. Verschueren, M. Garcia Bardon, A. Belmonte, G. S. Kar, G. Hellings, D. Biswas, F. Garcia-Redondo